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AS3693A QFN48
7.8 Digital interface
The AS3693A can be controlled with two types of interfaces.
7.8.1 I2C interface
7.8.1.1 Feature List
austria micro systems
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Fast-mode capability (max. SCL-frequency is 400 kHz)
Write formats: Single-Byte-Write, Page-Write
Read formats: Current-Address-Read, Random-Read, Sequential-Read
SDA input delay and SCL spike filtering by integrated RC-components
Figure 1 – I C Byte-Write:
7.8.1.2 Transfer Formats
2
S
DW
A
WA
A
reg_data
A P
S
Sr
START condition after STOP
repeated START
DW
DR
device address for write
device address for read
Figure 2 – I C Page-Write:
2
write register,
WA++
WA
A
N
P
white field
grey field
WA++
word address
acknowledge
no acknowledge
stop condition
slave as receiver
slave as transmitter
increment word address internally
S
DW
A
WA
A
reg_data 1
A
reg_data 2
A
…
reg_data n
A P
write register
WA++
write register
WA++
write register
WA++
by the 1 register byte transmitted from the slave. In Read-Mode any number of subsequent register bytes can
Figure 3 – I C Random-Read:
Byte-Write and Page-Write are used to write data to the slave.
The transmission begins with the START condition, which is generated by the master when the bus is in IDLE
state (the bus is free). The device-write address is followed by the word address. After the word address any
number of data bytes can be send to the slave. The word address is incremented internally, in order to write
subsequent data bytes on subsequent address locations.
For reading data from the slave device, the master has to change the transfer direction. This can be done either
with a repeated START condition followed by the device-read address, or simply with a new transmission START
followed by the device-read address, when the bus is in IDLE state. The device-read address is always followed
st
be read from the slave. The word address is incremented internally.
The diagrams below show various read formats available:
2
S
DW
A
WA
A Sr
DR
A
data
N P
read register
WA++
In order to change the data direction a repeated START condition is issued on the 1 SCL pulse after the
WA++
Random-Read and Sequential-Read are combined formats. The repeated START condition is used to change
the direction after the data transfer from the master.
The word address transfer is initiated with a START condition issued by the master while the bus is idle. The
START condition is followed by the device-write address and the word address.
st
acknowledge bit of the word address transfer. After the reception of the device-read address, the slave becomes
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